The technical field is in communication between different parts of an integrated data logic circuit.
Data logic circuits often require signals to travel relatively long distances on a chip or on a given circuit fabric. Faster architecture and chip requirements increase the need for faster processing between points on the given circuit or chip. In addition, as the relative distances that signals travel increase, there is a greater need to avoid latency or signal degradation.
One possible approach to solving such problems is to make use of registers along a long distance signal data path. In this approach, an input register first transmits the long distance signal to an intermediate register where the long distance signal is stored temporarily and then transmitted again to a final output register. Although using registers preserves integrity and signal strength, relaying data using registers requires an additional clock cycle to store the data into the intermediate register. This additional clock cycle causes an additional delay in transmitting the long distance signal from the input register to the output register.
Another potential solution is to route all of the signals from different parts of a given chip or circuit fabric to a single multiplexer (or mux), and then to multiplex the signals from the mux to appropriate destination points on the chip or circuit fabric. Multiplexing the signals would allow for a topologically simple way of transmitting the long distance signal, but at the expense of requiring more routing and more data combinations. The increased amount of routing and data combinations would both delay the long distance signal as the long distance signal is transmitted from the input register to the output register.
A series of logic xe2x80x9ccloudsxe2x80x9d that are connected to each other are used to provide logical functions and to propagate a long distance signal along a circuit fabric or chip. An initial logic cloud reads the signal from an input register, then buffers and repeats the signal before transmission through a series of xe2x80x9cmiddlexe2x80x9d logic clouds. The middle logic clouds may include any number of circuit connections, but every logic cloud passes the signal through a NAND-inverter combination before transmitting the signal through a connector circuit to the next logic cloud. The long distance signal passing through from the input cloud will be logically NANDed with at least one other signal, with the NANDed signal feeding into an inverter. The inverted long distance signal then feeds into the connector circuit and passes to the next logic cloud. The long-distance signal may be delayed arriving at the logic cloud and may not have reached a steady state as quickly as the other signals that are being NANDed with the long distance signal.
The NAND-inverter combination effectively performs a logical AND operation on the long distance signal and also performs a repeating operation on the long distance signal. The repeating arises from the combination of the NAND and the inverter gates. After passing through the logic clouds, the signal is passed through an end logic cloud and a destination logic cloud in which the signal is repeated and buffered before being driven into an output register.
Each chip or circuit fabric may contain a multiple number of logic clouds and different data pathways that use logic clouds. In addition, each logic cloud may include other logic gates and branches from the main circuit path, but all may have a NAND-inverter combination for propagating the signal between logic clouds.
A corresponding method is disclosed in which an input signal is propagated with both logical combination and repeating. An input signal, which is the long distance signal, is read from an input register and first buffered. The buffered signal is then repeated before the buffered signal is transmitted to the first NAND-inverter combination, where the signal is NANDed with a local signal that has reached a steady state and then inverted. The long distance signal has now become a pathway input signal to a path of one or more NAND-inverter combinations.
The method for propagation across a long distance begins when the pathway input signal, which is often the long distance signal, is first NANDed with at least one local signal that has reached a steady state. The pathway input signal is then inverted to form an intermediate output signal, which has higher drive strength than the pathway input signal. The intermediate output signal may be fed back as the pathway input signal for other NAND-inverter combinations that in turn would use the subsequent intermediate output signal as the pathway input signal for the next NAND-inverter combination. A first final intermediate output signal is produced once the long distance signal is fed through all of the given NAND-inverter combinations on a given intermediate block. The long distance signal may be combined with a number of other circuit elements as it is NANDed and inverted along the long distance signal""s logical path.
Once the long distance signal has completed the journey across the intermediate block, a final series of logical combinations occur. The long distance signal is first electronically repeated to boost the signal strength and is then buffered to condition the long distance signal. The long distance signal is then transmitted into the output register, where it may be retrieved.